Microelectronic devices are often manufactured in and on silicon wafers and on other types other substrates. Such integrated circuits may include millions of transistors, such as metal oxide semiconductor (MOS) field effect transistors, as are well known in the art. MOS transistors typically comprise source, gate, and drain regions. The source and the drain regions of the MOS transistor may comprise a silicon germanium alloy film, which may enhance the performance of a MOS transistor by introducing a strain into the crystal lattice of such a transistor. The strain introduced into the lattice can increase electron and hole mobility and thus the speed of a MOS transistor manufactured with source and drain regions comprising a silicon germanium alloy.
However, there are problems associated with the use of a silicon germanium alloy to fabricate the source and drain regions of a transistor. One problem that may be encountered is that during the deposition of a silicon germanium alloy film, the silicon germanium film may be deposited in an undesired area of a transistor. For example (referring to FIG. 3a), a substrate 300 (that preferably comprises silicon, and may comprise a transistor structure) may comprise a source region 310, a gate region 320 and a drain region 330. A silicon germanium layer 340 may be selectively deposited, for example, by epitaxial growth, as is known in the art, within the source region 310 and the drain region 330 (FIG. 3b).
The silicon germanium layer 340 may not grow, or deposit selectively i.e. the growth may not be confined to the exposed silicon areas (i.e., the source region 310 and the drain region 330) of the substrate 300. Some of the silicon germanium layer 310 may be deposited on a dielectric spacer structure 322 of the gate region 320, and/or on a dielectric isolation area 350 of the device, for example. Such an undesired growth of the silicon germanium layer 340 may result in poor performance or even inoperability of the device due to shorting of the device, etc.
Another problem encountered with the deposition of silicon germanium alloy films is that the thickness uniformity across a substrate may be different depending on the silicon density (i.e., the amount of exposed silicon area) in different parts of a device substrate, such as within a silicon die. For example, referring to FIG. 3c, a substrate 300 may comprise a region with a lower density of exposed silicon area 360, and a region with a higher density of exposed silicon area 370. During the growth of a silicon germanium layer, the region with the lower density of exposed silicon area 360 may exhibit a thicker film deposition than the region with the higher density of exposed silicon area 370. Referring to FIG. 3d, a first thickness 342 of the silicon germanium layer in the region of higher density of exposed silicon 370 may be significantly thinner than a second thickness 344 of the silicon germanium layer in the region of lower density of exposed silicon 360. Such uneven deposition of the silicon germanium layer across a substrate may result in poor yields, quality and reliability of the devices so fabricated across a substrate.
Therefore, it would be desirable to provide a method of selectively depositing a uniform silicon alloy film, such as a silicon germanium alloy film, for use in microelectronic device fabrication. The methods and structures of the present invention provide such a method.